[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$f2g0ge1lnx1lw5":3},{"code":4,"message":5,"data":6,"timestamp":32},10000,"success",{"full_name":7,"position":8,"description":9,"language":10,"stars":11,"forks":12,"stars_gained":13,"age_days":14,"hn_threads":15,"one_liner":22,"summary_md":23,"topic":24,"github_topics":27,"license":28,"homepage":29,"updated_at":30,"history":31},"tile-ai\u002Ftilelang",14,"Domain-specific language designed to streamline the development of high-performance GPU\u002FCPU\u002FAccelerators kernels","Python",8759,922,1312,751,[16],{"id":17,"title":18,"points":19,"comments":20,"posted_at":21},45417087,"Tile Language: DSL for High-Performance GPU\u002FCPU\u002FAccelerators Kernels",6,1,"2025-09-29","Lets kernel authors write high-performance GPU\u002FCPU\u002FNPU compute kernels like GEMM and FlashAttention in Python instead of CUDA or Triton.","## The problem\n\nWriting a fast attention or GEMM kernel today means hand-tuning against a specific GPU generation: you juggle shared-memory layouts, tensor-core paths, pipelining and TMA copies by hand, and the result is rarely portable. Rewriting for a new GPU or an NPU means starting over. TileLang gives kernel authors a Python-embedded DSL where you describe the tiling and schedule, and the compiler lowers it to CUDA, ROCm, Metal, CPU via LLVM, or Huawei Ascend NPUs.\n\n## What's different\n\nThe usual routes are raw CUDA (maximum control, minimum portability), or Triton (Pythonic, but with its own opinionated abstraction and heavy reliance on compiler-generated scheduling). TileLang sits closer to a tile-level DSL built on TVM's TIRX IR: you get explicit control over TMA copies, warp specialization, cluster copies and atom-level MMA ops while the backend handles codegen and synchronization. The concrete differentiators are the range of backends from one source (CUDA, ROCm, Metal, LLVM CPU, Ascend), the library of operator building blocks (GEMM, block-scaled MXFP4\u002FMXFP8 GEMM, FlashAttention, sparse MLA, scan, TMA gather\u002Fscatter), and first-class debugging tooling — IR pass diffing, a pass visualizer, and timing instrumentation — that most kernel DSLs lack.\n\n## Who it's for\n\nInference and training engineers writing custom kernels for LLMs (attention variants, quantized GEMMs, dequant paths), and teams that need one kernel source to run across NVIDIA, AMD and increasingly other accelerators. It is not for people who just want to call an existing operator library or use torch.compile — if `torch.nn.functional.scaled_dot_product_attention` covers you, TileLang is overkill. It is also a poor fit for those who need a stable, frozen API: releases still remove legacy APIs and the project is under 2 years old.\n\n## Cost of adoption\n\nPython package plus a heavier compile-time toolchain: you need working CUDA\u002FROCm\u002FMetal or LLVM setup, and per-release dependency churn (multiple releases in the README's news log, with v0.1.13 explicitly removing legacy APIs). The license field reports NOASSERTION, so check the actual license text before adopting it in a commercial product. Upfront investment is real: kernel programming is a specialization, and results depend on your target hardware.\n\n## Verdict\n\nThe project is young — created October 2024, roughly 8.7k stars — yet the release cadence in the news log is unusually dense, with monthly releases and steady hardware support (Blackwell, RDNA4, Ascend 950, Apple M5). Momentum looks genuine: it gained +1,312 stars this month, ranking #14 on the monthly Python board, though it hasn't appeared on the daily board. That profile fits a serious niche tool with a real community rather than a hype spike. Adopt it if you write kernels for a living and value portability and IR debugging; wait if you need API stability or are not prepared to track rapid changes.",{"slug":25,"name":26},"machine-learning","Machine Learning",[],"NOASSERTION","https:\u002F\u002Ftilelang.com\u002F","2026-10-24T18:36:04Z",[],1792883061]